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The microSPARC 32-bit microprocessor is a highly integrated RISC CPU Implementing the SPARC Architecture ver.8. Due to its relative high performance and low cost, it is ideally suited for low-cost single processor applications.

The microSPARC includes: A pipelined Integer Unit (IU), a Floating Point Unit (FPU), separate Instruction and Data Caches and a fully implemented Reference MMU.

It interfaces efficiently with the rest of the system, by incorporating complete DRAM and SBus interface and controllers. Testability at the system level is provided by supporting a complete JTAG interface.

Operating at the nominal internal frequency of 50 MHz, the throughput achieved is 26 SPECint92 and 21 SPECfp92.




- file last updated 14 Nov, 1995 -

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