Technology & Research
Silicon - Nanotechnology
Overview

Intel entered the nanotechnology era in 2000 when it began volume production of chips with sub-100nm length transistors. Intel believes that the future of nanotechnology is silicon based; the company has a major effort in this area, both in-house and through external research programs.

In December 2005, researchers at Intel and QinetiQ announced the development of a new, ultra-fast, yet very low power prototype transistor using indium antimonide (chemical symbol: InSb) that could form the basis of microprocessors and other logic products beginning in the second half of the next decade. The prototype transistor is much faster and consumes less power than previously announced transistors. Learn more below:
- Intel press release
- 85nm Gate Length Enhancement and Depletion mode InSb Quantum Well Transistors for Ultra High Speed and Very Low Power Digital Logic Applications [Paper, PDF 346KB]
- Enhancement and Depletion mode InSb Quantum Well Transistors for High Speed and Low Power Logic Applications [Presentation, PDF 716KB]
- Intel Makes Transistor Breakthrough Using New Materials [Presentation, PDF 1.4MB]
- 85nm InSb Quantum-Well Transistors with Ultra High Speed Performance and Very Low Power Dissipation [Presentation, PDF 770KB]
- Previous press release on Intel's work with QinetiQ

Read an overview [PDF 167KB] of Intel's activities in nanotechnology from Intel fellow Robert Chau that appeared in the May 2005 issue of Nanotech Briefs.

"Novel InSb-based Quantum Well Transistors for Ultra-High Speed, Low Power Logic Applications"
- Conference presentation [PDF 234KB]
- Technical paper [PDF 139KB]
Presenters: Suman Datta and Robert Chau
Co-Authors: T. Ashley, A. R. Barnes, L. Buckle, A. B. Dean, M. T. Emeny, M. Fearn, D. G. Hayes,K. P. Hilton, R. Jefferies, T. Martin, K. J. Nash, T. J. Phillips, W. H. A. Tang and P. J. Wilding
Event: The 7th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2004
Date: October 20, 2004

Presentations
"Investing in the Nano Domain — A View From the Moore's Law Perspective" [PDF 6.06MB]
Presenter: Maciek E. Orczyk
Event: IMEC ARRM: The IMEC Research-Business Forum, Leuven, Belgium
Date: October 18, 2005

"Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices" [PDF 2780KB]
Presenter: Robert Chau
Event: Plenary talk, 14th Biennial Conference on Insulating Films on Semiconductors 2005 (INFOS 2005), Leuven, Belgium
Date: June 22-24, 2005

"Si and Non-Si Nanotechnologies and their Benchmarking" [PDF 890KB]
Presenter: Robert Chau
Event: 2005 IEEE VLSI-TSA International Symposium on VLSI Technology, Hsinchu, Taiwan
Date: April 25-27, 2005

"Intel’s Silicon Power Savings Strategy" [PDF 5898KB]
Presenter: Paolo Gargini
Event: Intel Developer Forum
Date: March 3, 2005

"Innovation and Integration in the Nanoelectronics Era" [PDF 5255KB]
Presenter: Sunlin Chou
Event: International Solid-State Circuits Conference (ISSCC), keynote presentation
Date: February 7, 2005

"Intel Nanotechnology Overview" [PDF 2592KB]
Presenter: Paolo Gargini
Event: Intel Nanotechnology Virtual Open House
Date: October 22, 2004

"Silicon Nanotechnology at Intel" [PDF 6779KB]
Presenter: Ken David
Event: Intel Nanotechnology Virtual Open House
Date: October 22, 2004

"New Nano Logic Devices For the 2020 Time Frame" [PDF 971KB]
Presenter: George Bourianoff
Event: Intel Nanotechnology Virtual Open House
Date: October 22, 2004

"Advanced CMOS Transistors in the Nanotechnology Era for High-Performance, Low-Power Applications" [PDF 2951KB]
Presenter: Robert Chau
Event: 7th International Conference on Solid State and Integrated Circuit Technology (ICSICT 2004) in Beijing, China
Date: October 19, 2004

"Technology Challenges & Chemicals" [PDF 7.56MB]
Presenter: C. Michael Garner
Event: Presentation to Chemical & Gas Suppliers Group at Semicon West in San Francisco
Date: July 13, 2004

"Sailing with the ITRS Into Nanotechnology" [PDF 2100KB]
Presenter: Paolo Gargini
Event: Keynote presentation at Semicon West
Date: July 12, 2004

"Nanotechnology Stimulates Computing & Communication" [PDF 7283KB]
Presenter: David Perlmutter
Event: Nanotechnology Symposium at the Technion - Israel Institute of Technology
Date: May 31, 2004

"Nanoenergetics, Nanomaterials, Nanodevices, Nanocomputing - Putting the Pieces Together" [PDF 629KB]
Presenter: George Bourianoff
Event: European Materials Research Society 2004 Spring Meeting
Date: May 26, 2004

"Silicon Nanoelectronics and Nanotech Innovation" [PDF 2574KB]
Presenter: George Bourianoff
Event: Nanotrends 2004
Date: May 26, 2004

"Silicon Nanotechnology Challenges and Polymer Opportunities" [PDF 9.07MB]
Presenter: C. Michael Garner, Michael Goodner, Mansour Moinpour, Paul Koning, Gary Brist, and Tim T. Chen
Event: Symposium on Polymers for Microelectronics at Winterthur
Date: May 5, 2004

"Nano-material Opportunities and Challenges for Application in Electronics" [PDF 1485KB]
Presenter: C. Michael Garner
Co-Developers: Robert Meagley, Mansour Moinpour, Paul Koning, Tim T. Chen
Event: Presidents Seminar on Nanotechnology at the American Chemical Society annual meeting, Los Angeles
Date: March 29, 2004

"Silicon Nanoelectronics" [PDF 930KB]
Presenter: George Thompson
Event: Colorado NANO/MICRO Technology Summit
Date: March 24, 2004

"Nano-Scale Technology: Getting from Science to Engineering" [PDF 15,028KB]
Presenter: David Tennenhouse
Event: Nanotech 2004
Date: March 8, 2004

"An Intel Perspective on Silicon Nanoelectronics" [PDF 821MB]
Presenter: George Thompson
Event: Nanotech 2004
Date: March 8, 2004

"Investment Strategies in Small Tech" [PDF 3114KB]
Presenter: Maciek Orczyk
Event: Nanotech 2004
Date: March 10, 2004

"Silicon Research at Intel" [PDF 3063KB]
Presenter: Ken David
Event: Global Strategic Forum 2004
Date: March 6, 2004

"Extending Moore's Law in the Nanotechnology Era" [PDF 2334KB]
Presenter: Sunlin Chou
Event: Financial Community Webcast
Date: February 26, 2004

"Silicon Nanotechnology" [PDF 2619KB]
Presenter: Ken David
Event: Intel Developer Forum
Date: February 18, 2004

"Silicon Nanoelectronics and Nanotech Innovation" [PDF 1386KB]
Presenter: George Bourianoff
Event: Netherlands High Tech Connection Forum
Date: January 12, 2004

"Nanotechnology for High-Performance Computing" [PDF 2023KB]
Presenter: Marko Radosavljevic
Co-Author: Robert Chau
Event: DARPA Workshop on the Integration of Scalable CMOS Systems with Novel Nanostructures
Date: January 12, 2004

"Extending Moore’s Law with Nanotechnology" [PDF 3220KB]
Presenter: Carolyn Block
Event: University of Oregon Materials Science Institute Retreat
Date: September 18, 2003

"Nano-materials & Silicon Nanotechnology" [PDF 4473KB]
Presenter: Mike Garner
Event: NanoSIG Conference
Date: September 16, 2003

"Silicon Nano-Transistors and Breaking the 10nm Physical Gate Length Barrier" [PDF 3224KB]
Presenter: Robert Chau
Co-Authors: Brian Doyle, Mark Doczy, Suman Datta, Scott Hareland, Ben Jin, Jack Kavalieros and Matthew Metz
Event: 61st Device Research Conference, Salt Lake City, Utah
Date: June 24, 2003

"90 nm and Beyond: Moore's Law and More" [PDF 762KB]
Presenter: Josh Walden
Event: Intel Developer Forum, Berlin
Date: April 30, 2003

"Intel Corporation Silicon Technology Review" [PDF 7,061KB]
Presenter: Ken David
Event: SEMI: Strategic Business Conference 2003
Date: April 28-30, 2003

"Nanotechnology Fueling Moore's Law" [PDF 3137KB]
Presenter: Koji Shiro
Event: Intel Developer Forum, Japan
Date: April 11, 2003

"Nanotechnology in Electron Devices" [PDF 3528KB]
Presenter: Bob Gasser
Event: American Institute of Chemical Engineers Meeting (AIChE)
Date: February 11, 2003

"The Future of Nano-computing" [PDF 3431KB]
Presenter: George Bourianoff
Event: International Engineering Consortium and Electrical and Computer Engineering Department Heads, San Jose, California
Date: January 27, 2003

"Changing Vectors of Moore’s Law" [PDF 2.21MB]
Presenter: Andy Grove, Chairman of the Board, Intel Corp.
Event: 2002 International Electron Devices Meeting (IEDM)
Date: December 4, 2002

"Nanotechnologies for Computing and Communications" [PDF 984KB]
Presenter: Jose Maiz
Event: XVII Conference on Design of Circuits and Integrated Systems
Date: November 23, 2002

"Attacking the Red Brick Walls of the International Roadmap for Semiconductors" [PDF 4527KB]
Presenter: Paolo Gargini
Event: Microelectronics Materials Strategy Symposium 2002
Date: September 23-25, 2002

"Recent Progress in Quantum Computing and Quantum Memory" [PDF 111KB]
Presenter: George Bourianoff, Intel Corp.
Co-Author: Ralph Cavin, Semiconductor Research Corp.
Event: Trends in Nanotechnology 2002, Santiago de la Compostela, Spain
Date: September 11, 2002

"Enlightenment Beyond Classical CMOS" [PDF 2,712KB]
Presenter: Paolo Gargini
Event:2002 Industry Strategy Symposium
Date: January 6-9, 2002

"Silicon Technology: Scaling For the Second Half of the Decade" [PDF 1,460KB]
Author: Gerald Marcyk
Conference: Intel Developer Forum Fall 2001
Date: August 28, 2001

"30nm and 20nm Physical Gate Length CMOS Transistors" [PDF 1,086KB]
Presenters: Robert Chau
Presented at the "2001 Silicon Nanoelectronics Workshop"
Date: June 10-11, 2001, Kyoto, Japan

"Intel Establishes New Transistor Performance Record" [PDF 1,340KB]
Presenters: Robert Chau, Gerald Marcyk
Date: June 10, 2001

"Intel Research & Development RP1 Lab" [PDF 6,680KB]
Presenter: Gerald Marcyk
Date: May 11, 2001
Publications
"Emerging Silicon and Non-Silicon Nanoelectronic Devices: Opportunities and Challenges for Future High-Performance and Low-Power Computational Applications"
Authors: Robert Chau, Justin Brask, Suman Datta, Gilbert Dewey, Mark Doczy, Brian Doyle, Jack Kavalieros, Ben Jin, Matthew Metz, Amlan Majumdar, and Marko Radosavljevic
Event/Publication: 2005 IEEE VLSI-TSA International Symposium on VLSI Technology, April 25-27, 2005, Hsinchu, Taiwan, Proceedings of Technical Papers, Pages 13-16

"Benchmarking Nanotechnology for High-Performance and Low-Power Logic Transistor Applications"
Authors: Robert Chau, Datta, S., Doczy, M., Doyle, B., Jin, B.; Kavalieros, J., Majumdar, A., Metz, M. and Radosavljevic, M.
Publication: IEEE Transactions on Nanotechnology, Vol. 4, Issue 2, March 2005, pp. 153-158

"Advanced CMOS Transistors in the Nanotechnology Era for High-Performance, Low-Power Applications (Invited Paper)" [PDF 1509KB]
Authors: Robert Chau, Mark Doczy, Brian Doyle, Suman Datta, Gilbert Dewey, Jack Kavalieros, Ben Jin, Matthew Metz, Amlan Majumdar and Marko Radosavljevic
Publication: Proceedings of the 7th International Conference on Solid State and Integrated Circuit Technology (ICSICT 2004) in Beijing, China, pp. 26-30
Date: October 19, 2004

"Limits to Binary Logic Switch Scaling-A Gedanken Model"
Authors: Victor Zhirnov, Ralph Cavin, James Hutchby and George Bourianoff
Publication: Proceedings of the IEEE
Date: November, 2003

"Silicon nano-transistors for logic applications" [PDF 378KB]
Authors: Robert Chau, Boyan Boyanov, Brian Doyle, Mark Doczy, Suman Datta, Scott Hareland, Ben Jin, Jack Kavalieros, Matthew Metz
Publication: Physica E, Low-dimensional Systems and Nanostructures, Vol. 19, Issues 1-2, Pages 1-5
Date: July 2003

"Extending the Road Beyond CMOS"
Authors: James Hutchby, George Bourianoff, Victor Zhirnov and Joe Brewer
Publication: IEEE Circuits & Devices Magazine, March 2002

"Worldwide Technologies and the ITRS in the Current Economic Climate" [PDF 108KB]
Author: Paolo Gargini
Event: SPIE (International Society for Optical Engineering) Microlithography Meeting
Date: March 6, 2002

"2001 Technology Roadmap for Semiconductors"
Authors: A. Allan, D. Edenfeld, W. Joyner, A. Kahng, M. Rodgers and Y. Zorian
Publication: IEEE Computer, January 2002
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