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Since the invention of the very first computers in the 1940's and 1950's, computer chip design has been a rapidly evolving science. However, until fairly recent innovations the emerging advances in designs have been along the same lines as technology that is decades old. In the mid 1980's though, a new type of computer architecture was developed which rivals the importance of the advent of integrated circuits. This monumental invention was the creation of programmable logic devices, more specifically field programmable gate array (FPGA) chips.
Xilinx Inc. invented the FPGA in 1985. This company built on existing programmable logic (memory) and took the next step to create a field programmable chip. In order to understand the implementation of the FPGA, the previous programmable devices must first be understood.
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An example of a Xilinx chip
The first programmable logic device was PROM memory (Programmable Read Only Memory). This is non-volatile memory that can be loaded with information. The different types of PROM can either be mass programmed at a factory (mask-programmable chips) or programmed by the user (field programmable). Field programmable is the type from which FPGA chips evolved. Field programmable PROM can come in two types: EPROM (Erasable PROM) and EEPROM (Electronic Erasable PROM). The most commonly used EEPROM allows the user to erase the contents of the memory and reprogram it many times.
The next step in the evolution of programmable logic is a giant achievement toward the development of a field programmable gate array chip. This step was the advent of Programmable Logic Devices (or PLDs). Although there are several different types of PLDs, the most common implements a set of fixed logical OR gates preceded by an array of programmable AND logic gates. Like PROM, PLDs are also manufactured as both factory programmable and user programmable. These PLDs show a clear path to FPGA development.
These MPLDs (Mask Programmable Logic Devices) have programmable logic for the AND gates; however, they are hard-wired between logic gates. In 1985 with the invention of FPGAs, Xilinx created a device that would not only have programmable gates, but also have programmable interconnections between gates. The FPGAs were thus simply the next step in the evolution of PLDs.
Another early field programmable logic device was proposed by Steve Casselman in 1987 to the National Science Foundation. The ideas behind the proposal were to create a computer chip that used the new technology of programmable gate arrays and was able to be completely programmed using software. Within the proposed experiment Casselman set forth two goals: to determine a way to interconnect the planes of arrays, and to create a compiler which would be able to program functions into these new chips. Like the design of Xilinx, Casselman's chip would rely on the technology of EEPROM registers.
In the coming years, aid from the Naval Surface Warfare Department was applied for, and received, to develop a computer that would implement a total of 600,000 reprogrammable array gates. In 1992 a patent was granted for this system. With Casselman's success with this reconfigurable hardware technology, he became an expert in the field of "virtual computing" (so called due to its non-hard-wired nature), and went on to found the Virtual Computer Corporation.
FPGAs were brought into the limelight in 1997 when Adrian Thompson merged genetic algorithm technology and FPGAs to create a sound recognition device. This device used a Xilinx chip that contained an array of 64 x 64 cells. Thompson's algorithm allowed the FPGA to decide what the configuration of the chip should be to accomplish the sound recognition task. After repeated generations of the program (approximately 1500) over the period of two to three weeks, the chips not only was able to exceed the requirements set for recognition, but also did it very efficiently.
Perhaps the most amazing characteristic of Thompson's voice recognition system was that it used just over thirty of the cells in the FPGA. The best human-designed system used approximately five times that many cells! Of the cells that were used, five were not directly involved with the output, and seemed to not be used by the design. However, when these cells were turned off the FPGA no longer functioned.
The circuit diagram above shows the "design" of the sound recognition circuit, at least in a way. This diagram contains some recursive loops that are seemingly endless. To contain such loops is a violation of current methods of electrical design, however, the FPGA designed the circuit in this way. This circuit was designed using very different methods than conventional Von Neumann style chips, and yields many new possibilities for chip designs. The efficiency of this and many other "genetic" systems has been compared to the genetic system of the human mind. These types of designs find the most efficient way to accomplish a task by using properties of the silicon they are made from. The are not "designed," but rather are just formed. In many ways this is the way the human mind works when it makes neurological connections.