Application Processors are defined by the processor's ability to execute complex operating systems, such as Linux, Android / Chrome, Microsoft Windows (CE/Embedded), and Symbian, and to enable complex graphic user interfaces.

This class of processors integrate an Memory Management Unit (MMU) to manage the memory requirements of these complex OSs, and enable the download and execution of third party software.

Applications for this class of processor include:

• Smartphones
• Feature Phones
• Smartbooks* / Netbooks / eReaders
• Advanced Personal Media Players
• Digital Television
• Set-top Boxes & Satellite Receivers
• High-End Printers
• Personal Navigation Devices

A wide choice of application processors is available enabling Partners to choose the solution that fits the specific criteria of their application based on desired performance, die area, size, dynamic and static power,  and other considerations. The processors are all binary compatible enabling the development of highly portable applications which by promoting code reuse can significantly reduce engineering costs, and speed applications to market.

Traditional single-core processors range from the base-level ARM926EJ-S™ through to the Cortex™-A9 processor which is capable of in excess of 2GHz typical performance

Multicore processors, such as the Cortex-A9 MPCore™ processor, Cortex-A5 MPCore processor and ARM11MPCore processor, deliver extended performance and scalability by enabling up to four cores to be implemented in a single symmetric or asymmetric system, alongside a global interrupt handler and snoop control units.

*In the territory of the Federal Republic of Germany, the use of the term "Smartbook" in connection with portable computers is reserved exclusively to Smartbook AG, Germany.

Embedded Processors are primarily focused on delivering highly deterministic real-time behaviour in  a wide range of power sensitive applications.  These processors often execute a Real-Time Operating System (RTOS) alongside user-developed application code, and hence only require a Memory Protection Unit (MPU) as opposed to the MMU available in the Application Processors.

Applications for this class of processors include:

• Merchant Microcontrollers
• Automotive Control Systems
• Motor Control Systems
• White Goods controllers
• Wireless and Wired Sensor Networks
• Mass Storage Controllers
• Printers
• Network Devices

A wide choice of embedded processors is available enabling Partners to choose the solution that fits the specific criteria of their application based on desired performance, determinacy,  die area, size, dynamic and static power,  and other considerations.

The Cortex™-M0 and Cortex-M3 processors have been designed to deliver  industry-leading deterministic behaviour, lowest sleep and dynamic power, and smallest area possible whilst maintaining high processing efficiency.

The Cortex-R4 delivers a roadmap from Classic ARM processors including the ARM7™ and ARM9™ families, enabling existing applications to be easily ported to a higher performance platform.

ARM Secure Processors

SecurCore applications include:

• SIMs
• Smart Cards 
• Advanced Payment Systems
• Electronic Passports
• Electronic Ticketing and Transportation

A number of SecurCore™ processors are available enabling Partners to choose the solution that fits the specific criteria of their application based on desired performance, die area, size, dynamic and static power, and other considerations.

The SC100™ processor is based on the popular ARM7TDMI® processor. The SC300™ is based of the modern Cortex™-M3 processor, making it ideal for interrupt driven and power sensitive applications.

ARM FPGA-target Processor

For developers who desire compatibility with the ARM architecture but require the system programmability of FPGA devices ARM offers the Cortex-M1 processor. This processor is fully compatible with the Cortex-M0 processor and provides true flexibility in the choice of FPGA vendor.

The ARM architecture supports implementations across a wide range of performance points. It is established as the leading architecture in many market segments. The architectural simplicity of ARM processors leads to very small implementations, and small implementations mean devices can have very low power consumption. Implementation size, performance, and very low power consumption are key attributes of the ARM architecture.

The 32-bit ARM instruction set is based on RISC principles, including:

• Large uniform register file
• Load/store architecture, where data-processing operations only operate on register contents, not directly on memory contents
• Simple addressing modes, with all load/store addresses being determined from register contents and instruction fields only.

In addition, the ARM architecture includes some additional key features to improve code density and performance:

• Instructions that combine a shift with an arithmetic or logical operation
• Auto-increment and auto-decrement addressing modes to optimize program loops
• Load and store multiple instructions to maximize data throughput
• Conditional execution of almost all instructions to maximize execution throughput.

These enhancements to a basic RISC architecture enable ARM processors to achieve a good balance of high performance, small code size, low power consumption, and small silicon area.

The ARM architecture continues to evolve while maintaining strong compatibility across implementations.

• ARMv4T architecture introduced the 16-bit Thumb® instruction set alongside the 32-bit ARM instruction set to provide high performance together with leading code density in one architecture.  The 16-bit Thumb instruction set allowed up to 35% codesize saving over the 32-bit ARM instruction set, whilst maintaining the benefits of a 32-bit architecture.
  Example processors- ARM7TDMI^®
• ARMv5TEJ architecture introduced arithmetic support for digital signal processing (DSP) algorithms (such as saturated arithmetic) and the Jazelle® Java byte code engine to enable hardware execution of Java bytecodes, thus improving performance of applications written in Java.  Jazelle improves Java execution by 8x and provides an 80% reduction in power consumption compared to a non Java-accelerated core.  It has been used in many ARM processor-based portable devices to give a much-improved user experience in terms of performance in gaming and multimedia applications.
  Example processors – ARM926EJ-S™ and ARM968E-S™
• ARMv6 architecture introduced an array of new features including the Single Instruction Multiple Data (SIMD) operations.  The SIMD extensions are optimized for a broad range of software applications including video and audio codecs, where the extensions increase performance by up to four times. In addition Thumb-2 and TrustZone technologies were introduced as variants of the ARMv6 architecture.
  Example processors – ARM1176JZ  and ARM1136EJ
• ARMv6M architecture is designed for low-cost, high-performance devices providing a 32-bit powerful solution in a marketplace previously dominated by 8-bit devices.  Its 16-bit Thumb instruction set architecture allows designers to create cost-effective devices with minimal gate count.  The consistent interrupt handling structure and programmer's model provides a full upwards-compatible path for all Cortex-M series processors from the Cortex-M0 to the Cortex-M3 processor.
  Example processors - Cortex™-M0 and Cortex-M1
• ARMv7 architecture delivers a set of profiles customized to target applications. All Cortex processors implement the ARMv7 architecture, (except Cortex-M series processors which implement ARMv6M). All ARMv7 architecture profiles implement Thumb-2 technology which is an optimized, mixed 16/32-bit instruction set providing the performance advantages of the 32-bit ARM ISA with the code size advantages of the16-bit Thumb ISA, while retaining complete code compatibility with existing ARM solutions. The ARMv7 architecture also includes the NEON™ technology extensions to increase DSP and media processing throughput by up to 400 percent, and offers improved floating point support to address the needs of next generation 3D graphics and games physics, as well as traditional embedded control applications.  The Cortex architecture is designed to span across a broad range of application areas, from microcontrollers costing less than $1 to powerful multicore designs running at >2GHz.  The architecture is divided into 3 profiles:
• • Cortex-A – Application profile implementing a virtual memory system architecture based on an MMU (memory management unit), an optional NEON processing unit for multimedia applications and advanced hardware Floating Point unit with support for half-precision, single-precision and double-precision operations. Ideal for high-end consumer electronics devices, networking devices. mobile internet devices and enterprise markets.
    Example processors – Cortex-A9, Cortex-A8 and Cortex-A5
  • Cortex-R – Realtime profile implementing a protected memory system architecture based on an MPU (memory protection unit). Ideal for high performance real-time control systems including automotive and mass storage devices. 
    Example processor – Cortex-R4(F)
  • Cortex-M – Microcontroller profile designed for fast interrupt processing and ideal for cost-sensitive devices requiring highly deterministic behaviour and minimal gate count. 
    Example processor – Cortex-M3

Software Compatibility

With common instruction sets across all architecture variants, the ARM architecture allows users to build software for optimum compatibility, thus protecting your software investment.  The ARM architecture is supported by all leading software tools vendors allowing the use of common toolchains across multiple projects, and even interworking code produced by these toolchains, if they follow the Application Binary Interface for the ARM Architecture.

Future versions of the ARM architecture will preserve this compatibility.