|Senior Design Engineer|
|# of openings:||1|
As a Senior Design Engineer, you will develop compilation tools to allow designers to create circuits for FPGAs at a higher level of abstraction than conventional HDL-based descriptions. You will be working with a team researching and developing an OpenCL compiler for Altera devices. OpenCL is a parallel language aimed at providing a portable way of describing high-performance applications across CPUs, GPUs and other accelerator devices such as FPGAs. There are numerous technical challenges that need to be solved to enable efficient OpenCL compilation for FPGAs and you will be at the center of the effort which pushes the state-of-the-art in hardware compilation.
The successful candidate's minimum qualifications will include the following:
· Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or equivalent.
· Knowledge of C/C++ and strong software engineering skills are required.
Are you a returning applicant?
|<< Back to Search Results