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Synopsys Announces Virtualizer Development Kit (VDK) for Freescale's Qorivva MCU Family
Synopsys Unveils Embedded Vision Development System
Multimedia News Release
LG Adopts In-Design Physical Verification with IC Compiler and IC Validator after Multiple Successful Tapeouts
Fujitsu Semiconductor ASIC Design for 2G/3G/4G Baseband Processor in Volume Production with Synopsys 28-nm MIPI M-PHY
State of USB – Spring 2013 – Part 1 –....
Eric Huang
Jim Hogan falls prey to HAPS cloak of....
Michael Posner
Optimizing your Mixed Signal....
Hélène Thibiéroz
Smart Grid, Smart Lives
Karen Bartleson and Friends
Multi-programmable non-volatile memory....
Navraj Nandra
Meeting power, performance and....
Hezi Saar
MAY
07
Case Study: Prototyping an Embedded Vision Processor
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MAY
08
Late-Stage Leakage Recovery using the Lynx Design System
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MAY
09
Achieving Highly Reliable 10G Backplane Designs
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MAY
14
3 Easy Ways to Accelerate Embedded SoC Development
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MAY
15
Conquering HSPA+ Modem Design
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MAY
23
DFTMAX Compression, Hierarchical Test and iJTAG
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MAY
28
Samsung and Synopsys share their perspective on 14-nm FinFET design
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Ease Debug and Control of Network Software Using Virtual Prototypes to Do Full System Simulation
Implementing Ethernet QoS for use in Automotive Networking Designs
New Features and Updates: Sentaurus TCAD (H-2013.03)
Optimizing and Validating the Performance of Your AMBA®4 Interconnect
A Hierarchical, Low Power Design Approach for Gigascale Designs
What, Where, Who? Integrating Audio Analog Functionality into SoCs (Mandarin)
FinFET White Paper
TSMC and Synopsys on FinFET Technology
New! Galaxy Custom Router
Analog and special net routing for custom and digital IC design
Virtual Prototyping White Paper
Virtual Prototypes: When Where and How to Use Them
Processor Designer White Paper
Design of Embedded Vision Processors
Equivalence Checking White Paper
A Safe Approach to Hierarchical UPF Verification in Formality
VIP Fact Sheet
Ten Things You Should Know About Verification IP
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