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precision architecture reduced instruction set computer (PA-RISC) architecture
PA-RISC architecture is a high-performance type of RISC processor developed at Hewlett-Packard in the HP Labs. RISC architecture is a simplified chip designed to run very fast because it handles only a limited number of commands (those that account for most of the CPU's work) and standardizes the length of commands at 32 bits. The CPU can execute more complex commands (the other 20%) by layering simple instructions. RISC was developed as a low-cost alternative to CISC (complex instruction set computing) processors, the standard for microprocessors until 1975. CISC chips, which handle very complex commands of varying lengths, had evolved to become increasingly sophisticated as the demands of computer processing escalated.

In 1981, HP decided to replace the three types of CISC architectures it was using in its 1000, 3000, and 9000 lines with a single RISC platform. The research program was called Spectrum, a name chosen to represent the project goal of attaining scalability across wide-ranging applications and price performance points. In addition, the project team was charged with developing a chip that would achieve the theoretical goal of RISC, which was to boost processing speed by executing most instructions in a single cycle. The result was PA-RISC, and HP became the first major computer manufacturer to replace CISC architecture in all of its product lines. The PA-RISC and other RISC processors can run old programs designed for CISC processors with the use of emulators that break down complex commands into simpler commands.

HP continues to make advances in its PA-RISC architecture, and at the same time CISC and other RISC architectures continue to evolve. Longstanding debates over which is the superior architecture go on, but the battle lines have become blurred. Microprocessor designers have borrowed so many features from one another that most chips have become a hybrid of RISC and CISC.
 
 


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