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Digital Up / Down Converters

Analog Devices digital up/downconverters serve as the frequency translator and digital filter between data converters and DSP block. These innovative products enable highly programmable and configurable receive and transmit signal chains, allowing multi-channel, multi-carrier radio platforms in 3G wireless base stations. They also meet the digital data conversion requirements for many other communications applications.

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Last Updated: 9/2007

DDCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6620 65

1 Channel

(main and diversity)

1 Channel

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel
AD6624A 65

4 Channels

2 samples per symbol

2 Channels

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

2 Channels with FPGA for serial to parallel conversion

2 samples per chip

4 Channels

1 sample per chip

AD6634 80

4 Channels

2 samples per symbol

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

4 Channels

1 sample per chip

AD6635 80

8 Channels

2 samples per symbol

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

8 Channels

1 sample per chip

AD6636 150

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip

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DUCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6622

75

4 Channels

Serial output

2 Channels

Serial output

1 Channel

Serial output

1 Channel

Serial output

4 Channels

Serial output

AD6623 104

4 Channels

Modulate using I/Q symbols

Direct modulation xPSK

Mode switching

Power Ramping

2 Channels (real output)

Serial output

Includes IIR filter for phase pre-distortion

2 Channels (real output)

Serial output

2 Channels (real output)

Serial output

4 Channels

Serial output

Power Ramping

Direct modulation

AD6633 125

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

Includes IIR filter for phase pre-distortion

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

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Integrated ADC/DDC Receivers
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6652 65

4 Channels

2 samples per symbol

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

4 Channels

1 sample per chip

AD6653 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

AD6654 92.16

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip

AD6655 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

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QDUCs
Generic Part # Master Clock (MSPS min) Power Supply Voltage (Vnom) Power Dissipation (mW max) Description
AD9856 200 Single (+3) 1590 200 MHz Quadrature Digital Upconverter With 12-Bit Data Path
AD9857 200 Single (3.3 V) 2029 200 MSPS Quadrature Digital Upconverter with 14-bit Data Path
AD9957 1000 Multi (1.8, 3.3) 1800 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC
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