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  • ARMadillo
    Description:

    A multi-purpose ARM-based small piggy-back PCB with Linux support, Ethernet, USB, sound, graphic LCD and lots of I/O pins.

  • CernFIP
    Description:

    WorldFIP is a deterministic rad-hard fieldbus used at CERN's LHC for a variety of control systems: power converters, cryogenics, quench protection, etc. With Alstom phasing out support, it was decided to insource this technology at CERN. The most important goal of this project is to provide an FPGA-based replacement for the MicroFIP chip, a rad-hard ASIC for WorldFIP station development....

    • NanoFIP Test Board
      Description:

      The NanoFIP test board is used to test the functionality of the NanoFIP design. It can be controlled from a PC via RS-485. The board can also be used to perform tests under a focused radiation beam.

  • FIP Converter
    Description:

    A converter between USB/Ethernet and WorldFIP, allowing the bus arbitration and control of a WorldFIP fieldbus segment from a USB or Ethernet-equipped computer.

  • FMC Projects
    Description:

    FMCprojects shows the FMC Mezzanine and Carrier boards that are developed in the Open Hardware Repository context. Furthermore it gives useful data helping you to design modules complying to this VITA 57.1 standard. This actually is not a hardware project, but is there to help you find your way in the FMC standard and shows you which FMC Mezzanines and Carriers are being developed in the context of the Open Hardware project. ...

    • FMC ADC 100k 16b 8cha
      Description:

      FmcAdc100k16b8ch is an 8 channel 100kSPS 16 bit ADC card in FMC (FPGA Mezzanine Card) standard. The input voltage range is fixed at +/-10V.

    • FMC ADC 100M 14b 4cha
      Description:

      FmcAdc100M14b4chb is a 4 channel 100MSPS 14 bit ADC card in FMC (FPGA Mezzanine Card) standard. Gain can be programmed in three steps: +/-50mV, +/-0.5V, +/-5V. The offset correction is added in front of the ADC board and a voltage shift in the range of +/- 5V is possible for each gain range. ...

    • FMC DAC 1
      Description:

      FMC DAC 10M 16b 4cha: 16-bit 10Ms/s DAC card in FMC form-factor. Four channels with an output range of +/-10V. Three trigger inputs (start, pause and stop), common to the four outputs.

    • FMC Delay 1ns 8cha
      Description:

      A fine delay generator in FMC format with 1 input and 4 outputs. The resolution is 1 ns.

    • FMC DIO 16ch TTL a
      Description:

      FmcDIO16chTTLa is a 2x 8-bit port digital IO card in FMC form-factor. Each 8-bit port can be configured individually as input or output. IOs are TTL compatible. Additional test features can be mounted on the PCB.

    • FMC PCIe Carrier (PFC)
      Description:

      The PFC is a 4-lane PCIe carrier for a single VITA 57 (FMC) mezzanine. It has many memory and clocking resources and supports the White Rabbit timing and control network.
      For more details please refer to the Wiki pages.

    • FMC Time to Digital Converter
      Description:

      An FPGA Mezzanine Card (FMC) with a Time to Digital Converter chip to perform one-shot sub-nanosecond time interval measurements.

    • Optical link interface AMC
      Description:

      A Virtex6-based optical link interface AMC equipped with SFP+ and FMC sockets

    • RHINO
      Description:

      Reconfigurable Hardware Interface for Computing and Radio

    • Simple PCIe FMC carrier (SPEC)
      Description:

      A simple 4-lane PCIe carrier for FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network.

    • VME FMC Carrier (VFC)
      Description:

      The VFC is a VME carrier for two VITA 57 (FMC) mezzanines.
      For more details please refer to the wiki pages.

    • VXS DSP FMC carrier
      Description:

      A High Pin Count FMC carrier in VXS format with two Virtex 5 FPGAs plus a DSP on board.

  • HDL Core Lib
    Description:

    Project to share generic HDL cores.

    • DDR3 controller for Spartan6
      Description:

      DDR3 controller with two pipelined Wishbone slave ports. It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen.

    • EtherBone Core
      Description:

      Etherbone is an FPGA-core that connects Ethernet to internal on-chip wishbone buses permitting any core to talk to any other across Ethernet.

    • Gennum GN4124 core
      Description:

      A bridge between the local bus of the Gennum GN4124 (PCIe to local bus bridge) and Wishbone.

    • VME64x core
      Description:

      A VHDL core for a VME64x slave (Wishbone master).

    • Wishbone Serializer Core
      Description:

      A project to establish a transparent Wishbone bridge between two FPGAs using high-speed serial links.

    • Wishbone slave generator
      Description:

      wbgen2 is a tool for generating VHDL/Verilog cores which implement Wishbone bus slaves with certain registers, memory blocks, FIFOs and interrupts. The input is a C-like syntax file with an abstract description of what do we want to have in the slave. As a result, we get:...

  • Level conversion circuits
    Description:

    The level conversion board project hosts a set of boards in VME form factor, with additional remote diagnostics/monitoring via I2C.

    • Conv TTL NIM 3in 30out
      Description:

      A three-channel TTL to NIM (Nuclear Instrumentation Module) level conversion board in VME form factor.

  • Low-level RF Servo control
    Description:

    A card used in CERN's Linac 3 for the control of the electromagnetic field inside RF accelerating cavities.

  • Miscellaneous Projects
    Description:

    Projects not directly identifiable with PCB or HDL core developments.

    • ADC Testing
      Description:

      ADC testing procedures and software.

  • OHR Meta Project
    Description:

    A meta project used to discuss and present information about Open Hardware and related subjects.

  • OHR Support
    Description:

    OHR project where you can get help and guidelines about OHR. It's a support project for questions/feedback and bugs.

  • White Rabbit
    Description:

    White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. The aim is to be able to synchronize ~1000 nodes with sub-ns accuracy over fiber and copper lengths of up to 10 km. The key technologies used are physical layer syntonization (clock recovery) and PTP (IEEE 1588)....

    • White Rabbit Switch software
      Description:

      Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor.

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