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This Annotated Bibliogroaphy was created by Joey D. Markgraf on 05/06/2007 for CS271 taught by Dodi Coreson at Linn-Benton Commuity College



This page serves as a look into the idea of the von Neumann bottleneck, as well as some ways to overcome it. It is widely know and most of the articles on this page fully admit, that the bottleneck is due to the need for cheap hardware. The fundamental idea of the von Neumann Bottleneck is most commonly described as the system slowdown due to the seperation of the CPU and Main Memory. (See links section for more)


Annotated Biblography


Works Cited

Alexander, Thomas, and Mani Soma. "A Reconfigurable Approach to a Systolic Sorting Architecture." Circuits and Systems, 1989., IEEE International Symposium On 2 (1989):  1178-1182. 6 June 2007 <http://ieeexplore.ieee.org/iel2/815/3148/00100563.pdf?tp=&isnumber=&arnumber=100563>. 

This article attempts to overcome the problems of the von Neumann bottleneck by using systolic arrays. The article goes on to explain why systolic arrays can be used in conjunction with parallel processing to obtain a reliable, cost effective, bottleneck free architecture. It states that one key of the system is that it is able to configure it's own processors, allowing it to tackle problems that would otherwise limit such a system.


Backus, John. "Can Programming Be Liberated From the Von Neumann Style?: a Functional Style and Its Algebra of Programs." Communications of the ACM (1978):  613-641. 6 June 2007 <http://portal.acm.org/ft_gateway.cfm?id=359579&type=pdf&coll=GUIDE&dl=&CFID=24869019&CFTOKEN=18430386>. 

This article discusses how many different programming languages are built around von Neumann architecture, which the author believes is quite inefficient. The author then explains why using von Neumann style programming causes the von Neumann bottleneck to affect program and system performance. The rest of the article goes on to compare von Neumann style programming to more efficient concepts. The article closes with several examples of programming that would reduce or eliminate the von Neumann bottleneck, as well as other problems associated with von Neumann architecture.


Chisvin, Lawrence, and R. James Duckworth. "Content-Addressable and Associative Memory: Alternatives to Theubiquitous RAM." Computer (1989):  51-64. 6 June 2007 <http://ieeexplore.ieee.org/iel1/2/1319/00030732.pdf?tp=&isnumber=&arnumber=30732>.

This article explains Content-addressable and associative processing systems, which could compete with our current main use of address based storage systems. The article goes on to say that one major limitation to address based information storage is the fact that addresses have to be calcualted to retrieve data. We know this problem as the von Neumann bottleneck. The paper goes on to say that accessing data using content instead of addressing could possibly be faster and more effective. The article goes on to discuss the feasibility of such an idea, then concludes with how software and an application of such a technology would be realized.



Diessel, Oliver, David Kearney,  and Grant Wigley. "A Web-Based Multiuser Operating System for Reconfigurable Computing." LECTURE NOTES IN COMPUTER SCIENCE 1586 (1999):  579-587. 6 June 2007 <http://ipdps.cc.gatech.edu/1999/raw/diessel.pdf>. 

This article explains a theory to allow many people to use a single machine via the internet, while still maintaining performance as well as eliminating the von Neumann bottleneck. It starts out by explaining what hardware, architecture, and software would be needed for such a machine. The idea behind such a machine is that a user could connect directly into the architecture, allowing them to use the system as if they were a part of it. It concludes by explaining that such a system would have some constraints that would  affect how much of the system was actually being utilized.



Emma, P. G. "Understanding Some Simple Processor-Performance Limits." IBM Jounal of Research and Development (1997). Academic Search Premier. EBSCO. Oregon State University, Corvallis, OR. 6 June 2007 <https://www.research.ibm.com/journal/rd/413/emma.html>. 

This paper highlights the main concepts of the von Neumann architecture's frequent bottleneck between the CPU and Main Memory, as well as between the CPU and different system buses. The article mentions that the von Neumann IAS machine suffered from this bottleneck, as well as all modern systems seem to also suffer. The article goes on to mention that future bus protocols will reflect innovations such as multiple processors. Such future protocols could possibly be optimized to minimize or eliminate the effect of the von Neumann bottleneck.



Hartenstein, Reiner W., Rainer Kress,  and Helmut Reinig. "A Reconfigurable Data-Driven ALU for Xputers." FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop On (1994):  139-146. 6 June 2007 <http://ieeexplore.ieee.org/iel2/949/7612/00315602.pdf?tp=&isnumber=&arnumber=315602>. 

This article theorizes that a new type of Arithmetic logic unit could be used to much reduce the von Neumann Bottleneck. The aim of th e Xputer ALU is to reduce the von Neumann style of decoding and interpreting address and data signals. The article goes on to describe in detail how reorganized data path architecture would allow a "Xputer" to also reduce system wide bottlenecks.



Moore, Ronald, Bernd Klauer,  and Klaus Waldschmidt. "What Computer Architecture Can Learn From Computationalintelligence-and Vice Versa." EUROMICRO 97. _w Frontiers of Information Technology_ Proceedings of the 23rd EUROMICRO Conference (1997):  690-697. 6 June 2007 <http://ieeexplore.ieee.org/iel3/4879/13462/00617402.pdf?tp=&isnumber=&arnumber=617402>. 

This article discusses the idea that computer architecture can learn from some of the concepts discovered in the field of computational intelligence. One point of interest is the idea that we could learn how to eliminate the von Neumann bottleneck by using ideas from computational intelligence research. Most of the ideas are conceptually based, but the article does give some ideas like changing the idea that processing has to be scheduled. The article claims that by eliminating the need to process sequentially, a breakthrough could be realized. The article concludes by examining what computational intelligence could gain by the study of current computer architecture.



Narasimhan, V. Lakshmi. "A New Course on Supercomputers and Parallel Architectures." Education, IEEE Transactions On 38.4 (1995):  340-345. IEEE Xplore. EBSCO. Oregon State University, Corvallis, OR. 6 June 2007 <http://ieeexplore.ieee.org/iel1/13/9979/00473153.pdf?tp=&isnumber=&arnumber=473153>. 

This article highlights the need for people to understand the benefits of parallel architectures, primarily to reduce the effect of the von Neumann bottleneck. It continues by stating that there is very little emphasis on such an understanding in the college system, and that a course in needed. The article goes on to state how a course should be organizing, and what emphasis should be stressed.



Small, Charles H. "'Intelligent' RAM Outsmarts the Memory Bottleneck." Computer Design 37.5 (1998):  20-22. Computer Source. EBSCO. Oregon State University, Corvallis, OR. 6 June 2007 <http://search.ebscohost.com/login.aspx?direct=true&db=cph&AN=622844&site=ehost-live>. 

This article opens by introducing the concept of intelligent ram to the reader. The article then points out the idea that cpu cache only bridges a gap in memory speeds. The article goes on to point out that coupled with new architecture designer, IRAM could eliminate the von Neumann bottleneck completely.



Thimbleby, Harold. "Modes, WYSIWYG and the Von Neumann Bottleneck." Formal Methods and Human-Computer Interaction: II, IEE Colloquium On (1988):  4/1-4/5. 6 June 2007 <http://ieeexplore.ieee.org/iel3/2119/5399/00209312.pdf?tp=&isnumber=&arnumber=209312>. 

This article starts by explaining WYSIWYG and the von Neumann bottleneck. The article goes on to discuss the correlation between what actual data is process to what the user inputs. Much emphasis is put on what effect the von Nueumann architecture has on the user interface itself. The article calls on LISP programming as an example which highlights a user interface that compares to what data is being processed. One final argument the author makes is that advances in programming may reduce or even eliminate the von Neumann Bottleneck.



Additonal Information & Links


A defn of the Von Neumann Bottleneck

Von Neumann Bottleneck - Wikipedia

The life of John von Neumann


About the Author

This page was Created by Joey Markgraf for CS271 taught by Dodi Coreson, spring term 2007. Joey is a Junior at Oregon State University majoring in Business Administration. You may contact him here.