E158 Spring 2007 MIPS Project

E158: Introduction to CMOS VLSI Design

The Harvey Mudd College E158 class designed and built a 32-bit MIPS microprocessor in Spring 2007. This page contains all of the relevant documents and work products from the project.

Specifications
Milestones -- all project deadlines and product owners
Chip Report -- all of the project's documentation
Chip Plot -- Plot file for completed chip layout
Microarchitecture
RTL Code -- for testing with ideal memory
Random Testing -- generates random instruction tests
Library
MuddLib.jelib -- cell layouts & schematics
dff_cells.jelib
Electric PLA Generator
PLA Generator Test Documentation
Systems
Single FPGA Emulation -- for Single-FPGA configuration
Dual FPGA Emulation -- for Dual-FPGA/FPGA-PCB configuration
PC Board Files
C Compiler Toolchain -- toolchain and program sources
Yoda Warrior -- GCC build by James Stine of OK State
Test Programs -- Pre-built Verilog ROMs
Chip
Preliminary Chip Floorplan
Detailed Chip Floorplan -- up to date chip floorplan
chip.cif -- CIF file for the completed chip layout
Chip Library Files -- Electric library file for the chip
Generated Chip Netlist Verilog
Controller
Coprocessor 0
Fetch Stage -- Library and tests
Memory/Writeback Stage -- Library and tests
External Links
HMC-MIPS Google Code Website